Unit Delay Resettable (Simulink Reference)

Simulink Reference

Unit Delay Resettable

Delay a signal one sample period, with an external Boolean reset

Library

Additional Math & Discrete / Additional Discrete

Description

The Unit Delay Resettable block delays a signal one sample period.

The block can reset its state based on an external reset signal R. The block has two input ports, one for the input signal u and the other for the external reset signal R. When the reset signal is false, the block outputs the input signal delayed by one time step. When the reset signal is true, the block resets the current state to the initial condition, specified by the Initial condition parameter, and outputs that state delayed by one time step.

You specify the time between samples with the Sample time parameter. A setting of -1 means the Sample time is inherited.

Data Type Support

The Unit Delay Resettable block accepts signals of any data type supported by Simulink, including fixed-point data types.

Parameters and Dialog Box

Initial condition: Specify the initial output of the simulation.
Sample time: Specify the time interval between samples. To inherit the sample time, set this parameter to -1. See Specifying Sample Time in the online documentation for more information.

Characteristics

Direct Feedthrough
No, of the input port
Yes, of the reset port

Sample Time
Specified in the Sample time parameter

Scalar Expansion
Yes

Direct Feedthrough	No, of the input port Yes, of the reset port
Sample Time	Specified in the Sample time parameter
Scalar Expansion	Yes

Unit Delay External IC Unit Delay Resettable External IC