| Using Simulink | ![]() |
Referenced Model I/O
Simulink imposes the following restrictions on connecting signals to the inputs and outputs of Model blocks.
Bus I/O Limitations
A parent model can reference a model with bus input or output ports only if each bus port meets the following conditions:
Simulink.Bus class specified as the value of the port block's Bus object parameter.
Similarly, the bus connected to a bus input port of a referenced model must be defined by the same bus object that defines the bus input, i.e., the bus must be created by a Bus Creator block whose Bus object parameter is set to the bus object as is the Inport of the referenced model. This explains why the bus object must be visible to both the parent and the referenced model.
Index I/O Limitations
In some circumstances, Simulink does not propagate 0- or 1-based indexing information to the root-level ports connected to blocks in the referenced model that accept indices, e.g., the Assignment block, or produce indices, e.g., the For Iterator block. In particular, if a root-level input port is connected to index inputs in the referenced model whose 0- or 1-based indexing properties differ, Simulink does not set the 0- or 1-based indexing property of the input port. Similarly, if a root-level output port of the referenced model is connected to index outputs in the model that have different 0- or 1-based indexing settings, Simulink does not set the 0- or 1-based indexing property of the root-level output port. This can cause Simulink to miss incompatible index connections when the model is referenced by another model.
Matching I/O Rates
In a referenced model, the first nonvirtual block connected downstream from a root-level Inport of the referenced model and the first nonvirtual block connected upstream from a root-level Outport must have the sample time as the Inport or Outport block. If the rates do not match when you update or start a simulation of the referencing model, Simulink halts and displays an error. You can use Rate Transition blocks to match the root-level input and output sample times as illustrated in the following diagram.
| Model Block Sample Times | Model Interfaces | ![]() |
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