Model { Name "mergedemo" Version 6.2 MdlSubVersion 0 GraphicalInterface { NumRootInports 0 NumRootOutports 0 ParameterArgumentNames "" ComputedModelVersion "1.21" NumModelReferences 0 NumTestPointedSignals 0 } Description "Merge Block Demonstration \n\nThis interactive demo" "nstration introduces you to the following \nSimulink concepts. \n\n * Conditi" "onally executed subsystems \n * Logical Operator block \n * Boolean signals i" "n Simulink \n * Creating alternately enabling subsystems using the Merge bloc" "k\n\n" SavedCharacterEncoding "US-ASCII" SaveDefaultBlockParams on SampleTimeColors off LibraryLinkDisplay "none" WideLines off ShowLineDimensions off ShowPortDataTypes on ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowViewerIcons on SortedOrder off ExecutionContextIcon off ShowLinearizationAnnotations on RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeVarName "covCumulativeData" CovCumulativeReport off CovReportOnPause on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" MinMaxOverflowArchiveMode "Overwrite" BlockNameDataTip off BlockParametersDataTip on BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off Created "Mon Jul 27 12:06:55 1998" Creator "The MathWorks Inc." UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "batserve" ModifiedDateFormat "%" LastModifiedDate "Sat Jan 22 19:08:48 2005" ModelVersionFormat "1.%" ConfigurationManager "none" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" TryForcingSFcnDF off ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "oneshot" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect off ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock off BufferReuse on StrictBusMsg "None" ProdHWDeviceType "32-bit Generic" ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 1 Version "1.1.0" Array { Type "Handle" Dimension 7 Simulink.SolverCC { $ObjectID 2 Version "1.1.0" StartTime "0.0" StopTime "20" AbsTol "1e-6" FixedStep "auto" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep ".1" MinStep "auto" RelTol "1e-3" SolverMode "SingleTasking" Solver "VariableStepDiscrete" SolverName "VariableStepDiscrete" ZeroCrossControl "UseLocalSettings" AlgebraicLoopSolver "TrustRegion" SolverResetMethod "Fast" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Unconstrained" RateTranMode "Deterministic" } Simulink.DataIOCC { $ObjectID 3 Version "1.1.0" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints off MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveFormat "Array" SaveOutput on SaveState off SignalLogging on SaveTime on StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "logsout" OutputOption "RefineOutputTimes" OutputTimes "[]" Refine "1" } Simulink.OptimizationCC { $ObjectID 4 Array { Type "Cell" Dimension 5 Cell "ZeroExternalMemoryAtStartup" Cell "ZeroInternalMemoryAtStartup" Cell "InitFltsAndDblsToZero" Cell "OptimizeModelRefInitCode" Cell "NoFixptDivByZeroProtection" PropName "DisabledProps" } Version "1.1.0" BlockReduction off BooleanDataType on ConditionallyExecuteInputs on InlineParams off InlineInvariantSignals on OptimizeBlockIOStorage on BufferReuse on EnforceIntegerDowncast on ExpressionFolding on FoldNonRolledExpr on LocalBlockOutputs on ParameterPooling on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero on NoFixptDivByZeroProtection off EfficientFloat2IntCast off OptimizeModelRefInitCode off LifeSpan "inf" BufferReusableBoundary off } Simulink.DebuggingCC { $ObjectID 5 Version "1.1.0" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" SignalInfNanChecking "none" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" CheckSSInitialOutputMsg on CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "TryResolveAllWithWarning" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" SolverPrmCheckMsg "none" InheritedTsInSrcMsg "warning" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "warning" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "none" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterPrecisionLossMsg "warning" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Use local settings" SignalLabelMismatchMsg "none" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" SFcnCompatibilityMsg "none" UniqueDataStoreMsg "none" BusObjectLabelMismatch "none" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" ModelReferenceSimTargetVerbose off UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" ModelReferenceExtraNoncontSigs "error" } Simulink.HardwareCC { $ObjectID 6 Version "1.1.0" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 32 ProdBitPerLong 32 ProdIntDivRoundTo "Undefined" ProdEndianess "Unspecified" ProdWordSize 32 ProdShiftRightIntArith on ProdHWDeviceType "32-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "Specified" TargetUnknown on ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 7 Version "1.1.0" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" ModelReferenceNumInstancesAllowed "Multi" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 8 Array { Type "Cell" Dimension 1 Cell "IncludeHyperlinkInReport" PropName "DisabledProps" } Version "1.1.0" SystemTargetFile "grt.tlc" GenCodeOnly off MakeCommand "make_rtw" TemplateMakefile "grt_default_tmf" Description "Generic Real-Time Target" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ConfigAtBuild off IncludeHyperlinkInReport off LaunchReport off TargetLang "C" Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 9 Array { Type "Cell" Dimension 9 Cell "IgnoreCustomStorageClasses" Cell "InsertBlockDesc" Cell "SFDataObjDesc" Cell "SimulinkDataObjDesc" Cell "DefineNamingRule" Cell "SignalNamingRule" Cell "ParamNamingRule" Cell "InlinedPrmAccess" Cell "CustomSymbolStr" PropName "DisabledProps" } Version "1.1.0" ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses on IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off IncDataTypeInIds off PrefixModelToSubsysFcnNames on CustomSymbolStr "$R$N$M" MangleLength 1 DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off SimulinkBlockComments on EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off } Simulink.GRTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 10 Array { Type "Cell" Dimension 12 Cell "IncludeMdlTerminateFcn" Cell "CombineOutputUpdateFcns" Cell "SuppressErrorStatus" Cell "ERTCustomFileBanners" Cell "GenerateSampleERTMain" Cell "MultiInstanceERTCode" Cell "PurelyIntegerCode" Cell "SupportNonFinite" Cell "SupportComplex" Cell "SupportAbsoluteTime" Cell "SupportContinuousTime" Cell "SupportNonInlinedSFcns" PropName "DisabledProps" } Version "1.1.0" TargetFcnLib "ansi_tfl_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" GenFloatMathFcnCalls "ANSI_C" UtilityFuncGeneration "Auto" GenerateFullHeader on GenerateSampleERTMain off IsPILTarget off ModelReferenceCompliant on IncludeMdlTerminateFcn on CombineOutputUpdateFcns off SuppressErrorStatus off IncludeFileDelimiter "Auto" ERTCustomFileBanners off SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging on MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime on SupportNonInlinedSFcns on ExtMode off ExtModeStaticAlloc off ExtModeTesting off ExtModeStaticAllocSize 1000000 ExtModeTransport 0 ExtModeMexFile "ext_comm" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off GenerateASAP2 off } PropName "Components" } } PropName "Components" } Name "Configuration" SimulationMode "normal" CurrentDlgPage "Solver" } PropName "ConfigurationSets" } Simulink.ConfigSet { $PropName "ActiveConfigurationSet" $ObjectID 1 } BlockDefaults { Orientation "right" ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on } BlockParameterDefaults { Block { BlockType Clock DisplayTime off } Block { BlockType DataTypeConversion OutDataTypeMode "Inherit via back propagation" OutDataType "sfix(16)" OutScaling "2^0" LockScale off ConvertRealWorld "Real World Value (RWV)" RndMeth "Zero" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType DiscretePulseGenerator PulseType "Sample based" TimeSource "Use simulation time" Amplitude "1" Period "2" PulseWidth "1" PhaseDelay "0" SampleTime "1" VectorParams1D on } Block { BlockType EnablePort StatesWhenEnabling "held" ShowOutputPort off ZeroCross on } Block { BlockType Fcn Expr "sin(u[1])" SampleTime "-1" } Block { BlockType SignalConversion OverrideOpt off } Block { BlockType Inport UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" SampleTime "-1" DataType "auto" OutDataType "sfix(16)" OutScaling "2^0" SignalType "auto" SamplingMode "auto" Interpolate on } Block { BlockType Logic Operator "AND" Inputs "2" AllPortsSameDT on OutDataTypeMode "Logical (see Configuration Parameters: Optimiza" "tion)" LogicDataType "uint(8)" SampleTime "-1" } Block { BlockType Lookup InputValues "[-4:5]" OutputValues " rand(1,10)-0.5" LookUpMeth "Interpolation-Extrapolation" OutDataTypeMode "Same as input" OutDataType "sfix(16)" OutScaling "2^0" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" LUTDesignTableMode "Redesign Table" LUTDesignDataSource "Block Dialog" LUTDesignFunctionName "sqrt(x)" LUTDesignUseExistingBP on LUTDesignRelError "0.01" LUTDesignAbsError "1e-6" } Block { BlockType Merge Inputs "2" InitialOutput "[]" AllowUnequalInputPortWidths off InputPortOffsets "[]" } Block { BlockType Outport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" SampleTime "-1" DataType "auto" OutDataType "sfix(16)" OutScaling "2^0" SignalType "auto" SamplingMode "auto" OutputWhenDisabled "held" InitialOutput "[]" } Block { BlockType Reference } Block { BlockType Scope Floating off ModelBased off TickLabels "OneTimeTick" ZoomMode "on" Grid "on" TimeRange "auto" YMin "-5" YMax "5" SaveToWorkspace off SaveName "ScopeData" LimitDataPoints on MaxDataPoints "5000" Decimation "1" SampleInput off SampleTime "0" } Block { BlockType "S-Function" FunctionName "system" SFunctionModules "''" PortCounts "[]" } Block { BlockType Sin SineType "Time based" TimeSource "Use simulation time" Amplitude "1" Bias "0" Frequency "1" Phase "0" Samples "10" Offset "0" SampleTime "-1" VectorParams1D on } Block { BlockType SubSystem ShowPortLabels on Permissions "ReadWrite" PermitHierarchicalResolution "All" SystemSampleTime "-1" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" SimViewingDevice off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" } Block { BlockType Sum IconShape "rectangular" Inputs "++" InputSameDT on OutDataTypeMode "Same as first input" OutDataType "sfix(16)" OutScaling "2^0" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" } LineDefaults { FontName "Helvetica" FontSize 9 FontWeight "normal" FontAngle "normal" } System { Name "mergedemo" Location [31, 89, 532, 483] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" ZoomFactor "100" ReportName "simulink-default.rpt" Block { BlockType DataTypeConversion Name "Data Type Conversion" Position [80, 166, 135, 194] OutDataTypeMode "boolean" } Block { BlockType DiscretePulseGenerator Name "Discrete Pulse\nGenerator" Ports [0, 1] Position [20, 165, 50, 195] ShowName off FontName "Arial" FontSize 12 SampleTime "5" } Block { BlockType Logic Name "Logical\nOperator" Ports [1, 1] Position [167, 215, 213, 245] Orientation "down" NamePlacement "alternate" ShowName off FontName "Arial" FontSize 12 Operator "NOT" Inputs "1" } Block { BlockType Merge Name "Merge" Ports [2, 1] Position [295, 174, 385, 241] ShowName off FontName "Arial" FontSize 12 } Block { BlockType SubSystem Name "More Info" Ports [] Position [305, 287, 461, 357] BackgroundColor "lightBlue" DropShadow on ShowName off OpenFcn "mergedemoscript" FontName "Arial" FontSize 12 TreatAsAtomicUnit off MinAlgLoopOccurrences off RTWSystemCode "Auto" MaskDisplay "disp('Double click here \\nfor a step-by-step\\" "ntutorial on this model')" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskIconUnits "autoscale" System { Name "More Info" Location [115, 187, 620, 390] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" ZoomFactor "100" Annotation { Name "Merge Block Demonstration" Position [218, 22] FontSize 14 FontWeight "bold" } Annotation { Name "This demonstration shows what happens when " "the output of two enabled \nsubsystems are merged together. The output of th" "e merge block is the last\n output written to the input ports of the block.\n" "\nWhile the simulation is running, the subsystem which is green is the one \n" "whose signal is displayed on the scope. The coloring of the blocks is \ncontr" "olled by an S-Function which exists in the enabled subsystems. This\nS-Funct" "ion also artifically slows down the simulation by placing a short \npause in " "the S-Function.\n" Position [20, 40] HorizontalAlignment "left" VerticalAlignment "top" FontName "Arial" FontSize 12 } } } Block { BlockType SubSystem Name "More Info2" Ports [] Position [20, 20, 44, 43] DropShadow on ShowName off TreatAsAtomicUnit off MinAlgLoopOccurrences off RTWSystemCode "Auto" MaskDisplay "disp('?')" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskIconUnits "autoscale" System { Name "More Info2" Location [58, -10, 704, 414] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" ZoomFactor "100" Block { BlockType Reference Name "Model Info" Ports [] Position [15, 19, 610, 408] ShowName off FontName "Arial" SourceBlock "simulink/Model-Wide\nUtilities/Model Info" SourceType "CMBlock" ShowPortLabels "on" InitialBlockCM "none" BlockCM "None" Frame "on" DisplayStringWithTags "Model Description:\n-------------------\n\n" "%" MaskDisplayString "Model Description:\\n-------------------\\n" "\\nMerge Block Demonstration \\n\\nThis interactive demonstration introduces " "you to the following \\nSimulink concepts. \\n\\n * Conditionally executed su" "bsystems \\n * Logical Operator block \\n * Boolean signals in Simulink \\n *" " Creating alternately enabling subsystems using the Merge block\\n\\n" HorizontalTextAlignment "Left" LeftAlignmentValue "0.02" SourceBlockDiagram "mergedemo" TagMaxNumber "20" } } } Block { BlockType Reference Name "Repeating\nSequence" Ports [0, 1] Position [15, 283, 70, 327] ShowName off FontName "Arial" FontSize 12 SourceBlock "simulink/Sources/Repeating\nSequence" SourceType "Repeating table" ShowPortLabels on rep_seq_t "[0 1]" rep_seq_y "[0 2]" } Block { BlockType Scope Name "Scope" Ports [1] Position [430, 183, 480, 237] FontName "Arial" FontSize 12 Location [8, 551, 512, 737] Open off NumInputPorts "1" TickLabels "on" List { ListType AxesTitles axes1 "%" } TimeRange "20" YMin "-1.5" YMax "2" DataFormat "Array" } Block { BlockType Sin Name "Sine Wave" Ports [0, 1] Position [15, 87, 70, 133] ShowName off FontName "Arial" FontSize 12 SineType "Time based" Frequency "pi" SampleTime "0" } Block { BlockType SubSystem Name "Subsystem" Tag "MergeExample" Ports [1, 1, 1] Position [160, 81, 225, 139] NamePlacement "alternate" ShowName off FontName "Arial" FontSize 12 TreatAsAtomicUnit on MinAlgLoopOccurrences off RTWSystemCode "Auto" System { Name "Subsystem" Location [48, 210, 407, 362] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" ZoomFactor "100" Block { BlockType Inport Name "U" Position [70, 103, 100, 117] Port "1" IconDisplay "Port number" LatchInput off } Block { BlockType EnablePort Name "Enable" Ports [] Position [145, 25, 191, 60] StatesWhenEnabling "reset" } Block { BlockType "S-Function" Name "S-Function" Ports [] Position [245, 25, 305, 55] FunctionName "mergefcn" } Block { BlockType Outport Name "Y" Position [230, 103, 260, 117] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "U" SrcPort 1 DstBlock "Y" DstPort 1 } } } Block { BlockType SubSystem Name "Subsystem1" Tag "MergeExample" Ports [1, 1, 1] Position [160, 278, 225, 332] ShowName off FontName "Arial" FontSize 12 TreatAsAtomicUnit on MinAlgLoopOccurrences off RTWSystemCode "Auto" System { Name "Subsystem1" Location [210, 540, 569, 710] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" ZoomFactor "100" Block { BlockType Inport Name "U" Position [70, 103, 100, 117] Port "1" IconDisplay "Port number" LatchInput off } Block { BlockType EnablePort Name "Enable" Ports [] Position [145, 25, 191, 60] StatesWhenEnabling "reset" } Block { BlockType "S-Function" Name "S-Function" Ports [] Position [235, 25, 295, 55] FunctionName "mergefcn" } Block { BlockType Outport Name "Y" Position [230, 103, 260, 117] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "U" SrcPort 1 DstBlock "Y" DstPort 1 } } } Line { SrcBlock "Sine Wave" SrcPort 1 DstBlock "Subsystem" DstPort 1 } Line { SrcBlock "Subsystem" SrcPort 1 Points [20, 0; 0, 80] DstBlock "Merge" DstPort 1 } Line { SrcBlock "Subsystem1" SrcPort 1 Points [20, 0; 0, -80] DstBlock "Merge" DstPort 2 } Line { SrcBlock "Logical\nOperator" SrcPort 1 DstBlock "Subsystem1" DstPort enable } Line { SrcBlock "Discrete Pulse\nGenerator" SrcPort 1 DstBlock "Data Type Conversion" DstPort 1 } Line { SrcBlock "Repeating\nSequence" SrcPort 1 DstBlock "Subsystem1" DstPort 1 } Line { SrcBlock "Merge" SrcPort 1 DstBlock "Scope" DstPort 1 } Line { SrcBlock "Data Type Conversion" SrcPort 1 Points [0, 0; 50, 0] Branch { DstBlock "Logical\nOperator" DstPort 1 } Branch { DstBlock "Subsystem" DstPort enable } } Annotation { Name "Merge Block Demonstration" Position [225, 33] FontName "Arial" FontSize 18 FontWeight "bold" } } }