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.TH "IEEE1284_OPEN" 3 "" "" ""
.SH NAME
ieee1284_open \- open a port
.SH "SYNOPSIS"
.ad l
.hy 0

#include <ieee1284\&.h>
.sp
.HP 19
int\ \fBieee1284_open\fR\ (struct\ parport\ *\fIport\fR, int\ \fIflags\fR, int\ *\fIcapabilities\fR);
.ad
.hy

.SH "DESCRIPTION"

.PP
In order to begin using a port it must be opened\&. Any initial set\-up of the port is done at this stage\&. When an open port is no longer needed it should be closed with \fBieee1284_close\fR(3)\&.

.PP
The possible \fIflags\fR are:

.TP
\fBF1284_EXCL\fR
This device cannot share the port with any other device\&. If this is the case it must be declared at this stage, so that other drivers trying to access the port know not to bother; otherwise they will wait until this driver releases the port, i\&.e\&. never\&.

The iopl/dev\-port access methods don't support this yet, but the ppdev ones do\&.

.PP
If \fIcapabilities\fR is not \fBNULL\fR it must point to storage for an \fBint\fR, which will be treated as a set of flags, one per bit, which the library sets or clears as appropriate\&. If a capability is present it will be used when asked for\&. They are:

.TP
\fBCAP1284_RAW\fR
Pin\-level access is available\&. If this capability is present then the following functions are effective: \fBieee1284_write_data\fR, \fBieee1284_read_status\fR, \fBieee1284_wait_status\fR, \fBieee1284_write_control\fR, \fBieee1284_read_control\fR, \fBieee1284_frob_control\fR\&.

.TP
\fBCAP1284_NIBBLE\fR
There is an implementation of nibble mode for this port\&.

.TP
\fBCAP1284_BYTE\fR
There is an implementation of byte mode for this port\&.

.TP
\fBCAP1284_COMPAT\fR
There is an implementation of compatibility mode for this port\&.

.TP
\fBCAP1284_ECP\fR
There is a hardware implementation of ECP mode for this port\&.

.TP
\fBCAP1284_ECPRLE\fR
There is an RLE\-aware implementation of ECP mode for this port (the \fBF1284_RLE\fR flag is recognised by the ECP transfer functions)\&.

.TP
\fBCAP1284_ECPSWE\fR
There is a software implementation of ECP mode for this port\&.

.TP
\fBCAP1284_BECP\fR
There is an implementation of bounded ECP mode for this port\&.

.TP
\fBCAP1284_EPP\fR
There is a hardware implementation of EPP mode for this port\&.

.TP
\fBCAP1284_EPPSWE\fR
There is a software implementation of EPP mode for this port\&.

.TP
\fBCAP1284_IRQ\fR
An interrupt line is configured for this port and interrupt notifications can be received using \fBieee1284_get_irq_fd\fR(3)\&.

.TP
\fBCAP1284_DMA\fR
A DMA channel is configured for this port\&.

.SH "RETURN VALUE"

.TP
\fBE1284_OK\fR
The port is now opened\&.

.TP
\fBE1284_INIT\fR
There was a problem during port initialization\&. This could be because another driver has opened the port exclusively, or some other reason\&.

.TP
\fBE1284_NOMEM\fR
There is not enough memory\&.

.TP
\fBE1284_NOTAVAIL\fR
One or more of the supplied flags is not supported by this type of port\&.

.TP
\fBE1284_INVALIDPORT\fR
The \fIport\fR parameter is invalid (for instance, the \fIport\fR may already be open)\&.

.TP
\fBE1284_SYS\fR
There was a problem at the operating system level\&. The global variable \fIerrno\fR has been set appropriately\&.

.SH "SEE ALSO"

.PP
\fBieee1284_close\fR(3)

.SH AUTHOR
Tim Waugh <twaugh@redhat\&.com>.