#define __ver_z8530_dead_port	smp_10c78988
#define z8530_dead_port	_set_ver(z8530_dead_port)
#define __ver_z8530_hdlc_kilostream	smp_5cd24d29
#define z8530_hdlc_kilostream	_set_ver(z8530_hdlc_kilostream)
#define __ver_z8530_hdlc_kilostream_85230	smp_e3d80064
#define z8530_hdlc_kilostream_85230	_set_ver(z8530_hdlc_kilostream_85230)
#define __ver_z8530_sync	smp_bcca7ebd
#define z8530_sync	_set_ver(z8530_sync)
#define __ver_z8530_dma_sync	smp_8822cfbf
#define z8530_dma_sync	_set_ver(z8530_dma_sync)
#define __ver_z8530_txdma_sync	smp_428b5fc1
#define z8530_txdma_sync	_set_ver(z8530_txdma_sync)
#define __ver_z8530_nop	smp_22dba8c2
#define z8530_nop	_set_ver(z8530_nop)
#define __ver_z8530_interrupt	smp_5ddbd527
#define z8530_interrupt	_set_ver(z8530_interrupt)
#define __ver_z8530_sync_open	smp_79dfef96
#define z8530_sync_open	_set_ver(z8530_sync_open)
#define __ver_z8530_sync_close	smp_5f81f208
#define z8530_sync_close	_set_ver(z8530_sync_close)
#define __ver_z8530_sync_dma_open	smp_3d1d4e21
#define z8530_sync_dma_open	_set_ver(z8530_sync_dma_open)
#define __ver_z8530_sync_dma_close	smp_0ac01686
#define z8530_sync_dma_close	_set_ver(z8530_sync_dma_close)
#define __ver_z8530_sync_txdma_open	smp_76fee091
#define z8530_sync_txdma_open	_set_ver(z8530_sync_txdma_open)
#define __ver_z8530_sync_txdma_close	smp_c1ea46a4
#define z8530_sync_txdma_close	_set_ver(z8530_sync_txdma_close)
#define __ver_z8530_describe	smp_9142b553
#define z8530_describe	_set_ver(z8530_describe)
#define __ver_z8530_init	smp_72614055
#define z8530_init	_set_ver(z8530_init)
#define __ver_z8530_shutdown	smp_8522c52f
#define z8530_shutdown	_set_ver(z8530_shutdown)
#define __ver_z8530_channel_load	smp_d66432eb
#define z8530_channel_load	_set_ver(z8530_channel_load)
#define __ver_z8530_null_rx	smp_96f73634
#define z8530_null_rx	_set_ver(z8530_null_rx)
#define __ver_z8530_queue_xmit	smp_58cad19e
#define z8530_queue_xmit	_set_ver(z8530_queue_xmit)
#define __ver_z8530_get_stats	smp_f86cffc4
#define z8530_get_stats	_set_ver(z8530_get_stats)